Characterization of Contact and Via Failure under Short Duration High Pulsed Current Stress

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Characterization of Contact and Via Failure under Short Duration High Pulsed Current Stress Kaustav Banerjee, Ajith Amerasekera*, Girish Dixit*, Nathan Cheung and Chenming Hu Department of Electrical

1 Characterization of Contact and Via Failure under Short Duration High Pulsed Current Stress Kaustav Banerjee, Ajith Amerasekera*, Girish Dixit*, Nathan Cheung and Chenming Hu Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA 947 *Semiconductor Process and Device Center, Texas Instruments Inc., North Central Expressway, MS 461, Dallas, TX 7543 Abstract Contact and via failure under short-duration, high current pulses has been characterized for the first time. It is shown that the critical current is strongly dependent on the pulse width, and contacthia cross section area. It is also found that for contact structures the critical current depends on the thermal conductivity of the underlying diffusion region and is independent of the electrical properties such as sheet resistance. Further, it is shown that single A1 contacts can sink similar currents as compared to W contacts, and multiple W/Al contact structures will fail under smaller current density as a result of lower heat dissipation capacity. The effect gets stronger with thicker contact liner metal. Critical current density is also found to be decreasing with increasing number of vias due to lower heat dissipating capacity of multiple vias. Furthermore, the contacthia failure thresholds were found to be independent of the direction of electron flow. Contact breakdown mechanism has been shown to be related to the TiN/TiSi interface reaction which causes a sudden increase in contact resistance. The via failure mechanism has been shown to be due to thermal runaway resulting in a complete destruction of the structures. poly-si of 3. pm width. Further, structures with multiple (3) contacts were also examined. Also, contacts made of both W and AI were analyzed to provide reliability comparison under these conditions. Fig.1 shows the layout and schematic cross section of a single contact structure. For via structures the number of vias was varied from 1 through 9 to comprehend the effects of these high pulsed currents. A standard transmission line technique [6j was used to generate constant current pulses of varying pulse width (1, and 5 ns). A Kelvin type set up was employed to capture the voltage pulse across the contactshias using a digitizing oscilloscope. The voltage across these structures rose roughly linearly with time during all the pulsing events in agreement with previous work [4, 71. The instantaneous voltage pulse across the contacts and vias were captured using a difference math function channel on the oscilloscope as shown in Fig.. The results of this detailed analysis are presented below for contacts and vias. I. Introduction Aggressive scaling of Si based IC devices motivated by the desire for faster circuit speed and higher packing density has increased the functional complexity of VLSI circuits. This has in turn, reduced the interconnect metal pitch and increased the number of metallization levels. Also, scaling of MOSFET devices have reduced the width of diffusion regions. This diffusion region and metal line width reduction has consequently resulted in contact and via sizes to shrink in order to satisfy minimum tolerance rules. Recently it has been demonstrated that thermal effects, instead of electromigration itself, will start to dominate interconnect design guidelines for advanced high performance interconnects [ 1,j. Further, metal lines have been reported to thermally breakdown under high pulsed current stress conditions such as during ESD events [3]. We have recently presented a model for interconnect heating and failure under ESD conditions [4] and have demonstrated the effects of these high pulsed currents on interconnect scaling using low-k dielectric [5]. Contacts and vias can heat up considerably under similar conditions owing to higher current densities that lead to either contacthia breakdown or a degradation of contact performance. Characterization of the effect of short duration high current pulses on contact and via structures is desirable to provide thermal design guidelines in the near future. The purpose of this paper is to characterize these high pulsed current effects on a variety of contact and via structures in order to develop a better understanding of their failure mechanisms that can be used to design robust multilevel interconnect structures for future deep sub micron technologies. 11. Experimental A number of different contact structures were used in this study. The contact sizes were.3,.35 and.4 pm. The different types of diffusion layers underneath included n and p type Si and Metal I (AlCu) Diffusion Area b) Figure I. (a) The layout of a single contact under study. (b) The schematic cross sectional view of the contact structure Analysis of Contact Structures For all contact sizes as pulse width increases the critical current, Icrit, and critical current density &,it decreases as shown in Fig. 3. These critical currents were determined at that current level after which there was an increase in the resistance of the contact as measured with a low current pulse so as to avoid joule heating. Hence, there is no visual damage, as resistance increase is used as a 1997 IEEE 1 6

2 failure criteria. At the critical breakdown point the resistance rises past 1.6 times the low-current resistance corresponding to a temperature rise past 8 OC, which was computed using the measured resistance-temperature relation for the contact structures. interface. This result is in agreement with previously published work on TiN/TiSi barrier contact failure under DC stress [SI. 1: Voltage pulse across pads 1 and (VIZ) : Current Pulse 3 Voltage pulse across pads 3 and (V3) 4: Voltage pulse across pads 4 and Z (V4) 5: Voltage pulse across contact (V5=V3-V4) 5E+7 1E+8 1.5E+O8 E+8 J (A/cm) Figure 1. Effect of contact size and number on the resistance ri:se factor for 1 ns pulses (results shown for W). Figure. Voltage pulse across contactshias captured using a difference math function in a digitizing oscilloscope. The difference between pulse 3 and 4 is electronically calculated and displayed as pulse 5. After this critical point the resistance of the contact structure suddenly rises by more than 1%. As shown later by TEM analysis this resistance rise is caused by the TiN/TiSi barrier degradation. p?" p? d IAt = 1 ns/o.jum sinele contacts I I h Failure Threshold n-type poly-si n-type Si OE+O 5E+7 1E+8 E+8 E+8 J (AIcm') Figure 3. Resistance rise factor as a function of current density for single.3pm W-contacts shown for various pulse widths. For a given metal width W, as the contact area increases Icrit increases but Jcrit decreases as shown in Fig. 4. This is due to decreasing heat dissipation (x surface area) with increasing thermal capacity (K volume) of the contact metal, in agreement with our recent work on scaled interconnect lines [5]. It can also be observed that for 3X.3pm multiple contact structures Jcrit is lower than for any of the single contact structures. This is expected, since for a multiple contact structure the heat dissipating capacity is reduced due to the presence of multiple hot columns and hence Icrit per contact is lower causing lowering of Jcrit. It was also observed that contacts to poly silicon substrates had a lower Jcrit than those to Si substrates as shown in Fig. 5. This is due to the poly Si being isolated from the Si substrate by an oxide layer which causes lower heat dissipation into the substrate during the pulsing events. Contacts to n and p type diffusion regions had similar Jcrit which indicated that the contact degradation is insensitive to the sheet resistivity of the underlying diffusion region for these test structure dimensions. Also, the type of dopant impurity has little effect on the thermal conductivity of Si. Rather, the rise in contact resistance arises primarily due to the failure of the TiN/TiSi OE+O 5E+7 1E+8 E+8 E+8 J (AIcm') Figure 5. Heating and failure of W-contacts on n type Si and Poly-Si. Analysis of contact structures made of A1 showed similar current carrying capability and the results are shown for.4pm single contact structures in Fig. 6. Again, this result supports the conclusion that contact degradation is not dependent on the material used to fill the contact plugs. Instead, it is the nitrideklicide interface that suffers degradation. E" 1. 4 sr.4 pm contactsiat = 5 ns F- t+w-contact OE+O 5E+7 1 E+8 +8 J [AIcm'] Figure 6. Heating and failure of single.4pm, W and AI contacts under 5 ns pulsed stress. For all contact structures the failure thresholds were also found to be independent of the direction of the current (electron) flow because the failure mechanism is predominantly thermally driven. In order to verify this breakdown mechanism, contact structures made of A1 but with a thicker TiN liner were pulsed under similar stress conditions. The result in Fig. 7 shows that the contact with the thicker TiN liner heats up and fails more rapidly compared to the contact with thinner TiN liner. This is due to the thicker TIN 1 7

film in contact with the silicide layer which forms a larger quantity of high resistivity interface material. This confirms that the TiN has an important role in the failure mechanism. d U, 1.6 1..8.

3 film in contact with the silicide layer which forms a larger quantity of high resistivity interface material. This confirms that the TiN has an important role in the failure mechanism. d U, R-AI-cont/4OOA -AAI-cont/A TIN TIN OE+O 5E+7 1 E+8 J [A/cm] In Fig. 9 the TEM micrographs show damage under pulsed stress for contacts to n+ poly-si. It can be observed that the poly-si also suffers significant damage. In Fig. 9a the poly underneath the contact has a different contrast and the TiSi has been consumed. This could be due to the enhanced diffusion of TiSi in poly-si through the grain boundaries. In Fig. 9b the substrate seems to be heavily damaged. Due to more severe joule heating, in addition to the TiSi diffusion into the poly-si, the W has moved down through the weakened barrier into the poly-si. Fig. 1 shows a TEM micrograph for a stressed AI contact to n+ Si. It can be observed once again that the TiN/TiSi interface area has reacted. This is in agreement with our conclusion that the breakdown initiates at the interface. The differences observed in the failure mechanisms of contacts to Si and poly-si will be discussed further in the last section of this paper. Figure 7. Effect of TiN liner thickness on the robustness of 3X.3pm AI contacts under 5 ns pulsed stress. Fig. 8 shows TEM micrographs of an unstressed and stressed W- contact structure showing the TiN/TiSi interface. Both structures had a TiN liner. It can be observed from Fig. 8b that an interfacial reaction product has formed underneath the contact area, which may be the cause for the rise of the contact resistance. There are also voids at the contact perimeter which are probably due to the volume change associated with the interfacial reaction. b) Figure 9. TEM micrographs showing W-contact structures to n+ poly-si with stressed TiN/TiSi interfaces with (a) 1 ns and (b) 5 ns pulses. b? Figure 8. TEM micrographs showing W-contact structures to n+ Si with (a) unstressed TiNEiSi, interface and (b) stressed TiNiTiSi, interface. IV. Analysis of Via Structures We have also investigated the breakdown of vias. A via structure connects two levels of metal. It was observed that, for all via sizes, as pulse width increases Jcrit decreases. This is due to the higher energy in longer pulse widths that result in a higher temperature rise. The critical temperature rise is >lo OC for failure at the via as compared to 8 OC for contacts. Vias are completely destroyed once the critical value of the current has been exceeded. In comparison failure in contact structures is always characterized by a 1 8

degradation of the TiN/TiSi interface. It is also observed that for up to 3 vias of.4pm size and with 3.pm line widths, failure is located at the via (dark spots in Fig.

4 degradation of the TiN/TiSi interface. It is also observed that for up to 3 vias of.4pm size and with 3.pm line widths, failure is located at the via (dark spots in Fig. 1 la and b) but for 4 or more vias the failure site is located in the metal leads as shown in Fig. 1 IC. This is due primarily to the fact that the critical current density decreases as number of via is increased as shown in Fig. 1, due to lower heat dissipating capacity. Further, TiN/AlCu/TiN metal lines arc known to breakdown around 1 OC under short pulse stress [4]. Hence, for higher than a certain number of vias the line heats up more than the plug area. The metal 1 line has opened up at regions far away from the via area as shown in Fig. 1 IC due to severe joule heating. N- m o v- y 1. Y.- Y 5 I Number of Vias Figure 1. TEM micrograph showing AI-contact structure to nt Si with TiN/TiSi, interface stressed under a 1 ns pulse. Figure 1. Critical current density of.4pm W via structures under 1 ns pulsed stress. I 1 Via I Metal 1 Damaged tegion Fig. 13 shows that vias can tolerate higher current or pulse energy before failure than contacts. This is due to their lower resistance path as compared to the contacts which have the higher resistance diffusion region in the current path. Hence, the via structures have lower joule heating and better heat conduction compared to the contact structures. Metal Via cross section 1.8 NT 1.6 o (D 1. II E 1 L., 7.4pm W-Vias 9.4pm W -contactp.8 ~ At [ns] Figure 13. Critical current density to cause degradatiodfailure is higher for vias as compared to contacts. Fia. 14 shows a SEM micrograph of a stressed single W-via b/ structure- Unlike the contact structure the via has been destroyed as Figure IZ. Optical micro graph showing.4 pm via structures with (a) 1 via and a schematic cross sectional view, (b) 3 and (c) 9 vias. Note that for the 9 via case, the damaged region is at the interconnect, not at the via region. Figure 14. SEM micrograph showing a single W-via damaged under high pulsed current stress. 1 9

V. Discussion of Contact and Via Failure Mechanisms In this study, a new failure mode of silicided barrier contact structures made of W and Al, subjected to short-time joule heating is reported.

5 V. Discussion of Contact and Via Failure Mechanisms In this study, a new failure mode of silicided barrier contact structures made of W and Al, subjected to short-time joule heating is reported. It has been shown that such failure mode arises during the discharge of short duration (1-5 ns) high current pulses through the contact structures, such as those encountered during ESD type events. The failure is characterized by a breakdown of the TiN/TiSi interface in the contact structure due to interfacial reaction, which results in the formation of a new phase with a higher resistivity. This interface degradation, being thermally driven, occurs past a constant critical resistance rise factor independent of contact size and number. The corresponding critical temperature rise is 8 OC. At this point it is appropriate to note that an earlier study on contact failures under DC stress [SI had indicated a critical temperature of 465 OC. However, this was determined by the maximum current density carrying capacity of the underlying diffusion region, which became intrinsic past this critical temperature. The diffusion regions in this work always have a bigger cross sectional area as compared to the contact itself. Therefore the current density in a single contact structure increases more rapidly than in the diffusion region causing greater self heating in the contact. This is specially important for self heating during short pulses where there is minimal heat dissipation due to the non equilibrium nature of the heating. Hence an estimation of the upper limit of temperature rise in the contact along with an understanding of degradation mechanism is necessary for providing design guidelines for advanced high performance interconnects. Interestingly, the critical temperature estimated in [8] was found to be independent of the type of dopant impurity in the diffusion region in agreement with this work. Another study on contact failure under DC stress has described localized melting near the metalsilicon interface and subsequent metal migration along Si close to the %Si interface to be the cause of failure [9]. But it was also pointed out that the presence of a p-n junction is necessary to initiate metal migration between contacts. It is also noted that the failure mode observed for contact degradation in this work was independent of the direction of the current pulse (or electrons), contrary to previously published work on silicided contact wearout under DC stress [lo]. This result is expected, since Si depletion or accumulation under contacts subjected to DC stress is mainly driven by electromigration, which is known to have a dependence on the direction of electron flow The vias studied in this work failed catastrophically, once the critical current density was reached. In the case of interfacial reactions, the change of via resistance due to metal-metal compounds is probably much less than that of metal-si compounds in contacts. This can explain the absence of a resistance rise in the case of vias. Instead, failure occurs due to an open circuit which is caused by the eventual thermal runaway and complete destruction of the structures. Again, via failure under short duration pulsed stress exhibited no dependence on the current polarity, verifying that this is not an electromigration induced failure that have been reported under continuos stress conditions [ 1, 131. VI. Conclusions In conclusion we have characterized the effects of high current pulses of very short duration on contacts and vias. It has been shown that the critical current is strongly dependent on the pulse width, and the cross sectional area of the contacthia. It is also shown that for contact structures the critical current is influenced by the thermal conductivity of the underlying material and is independent of the electrical properties such as sheet resistivity. It is also demonstrated that single AI contacts can sink similar currents as compared to W contacts and multiple W/AI contact structures will fail under smaller current density as a result of lower heat dissipation capacity and the effect gets stronger with thicker contact liner metal. Also contact and via failures under short time joule heating has been found to be independent of the direction of the current flow. TEM and SEM micrographs detailing the degradation of contactdvias have been studied. Hence, an understanding of the failure mechanisms has been presented in this work that can be used for building robust interconnect structures for high pulsed current stress. Acknowledgments The authors would like to acknowledge W. Hunter and R. Havemann of TI for their support and encouragement during various phases of this work. Special thanks to Liya Liang of Precision TEM Inc., Santa Clara, for the TEM micrographs. They would also like to acknowledge the SRC (96- IJ-148), arid the MICRO program for their continued support. Refcrcnccs [I] P. K. Chatterjee et al, Trends for Deep Submicron VLSI and Their Implications for Reliability, Proc. IRPS, pp , [] W. R. Hunter, The Implications of Self-Consistent Current Density Design Guidelines Comprehending Electromigration and Joule Heating for Interconnect Technology Evolution, Tech. Dig. IEDM, pp , [3] S. Ramaswamy, C. Duvvury and S. Kang, EOSESD Reliability of Deep Sub-Micron NMOS Protection Devices, Proc. IRPS, pp , [4] K. Banerjee, A. Amerasekera and C. IIu, Characterization of VLSI Circuit Interconnect Heating and Failure under ESD Conditions, Pvoc. IRPS, pp , [5] K. Banerjee, A. Amerasekera, G. Dixit and C. Hu, The Effect of Interconnect Scaling and Low-k Dielectric on the Thermal Characteristics of the IC Metal, Tech. Dig. ZEDM, pp , [6] T. J. Maloney and N. Khurana, Transmission line pulsing techniques for circuit modeling of ESD phenomena, ESD/EOS Symp. Proc., pp , [7] T. J. Maloney, Integrated Circuit Metal in the Charged Device Model: Bootstrap Heating, Melt Damage and Scaling Laws, EOYESD Symp. Proc. pp , 199. [SI K. Fu and R. E. Pyle, On the Failure Mechanisms of Titanium Nitride/Titanium Silicide Barrier Contacts under High Current Stress, IEEE Trans. Electron Devices., Vol. 35, No. 1, pp , [9] A. Christou, Electro-thermomigration in Al/Si, Au/Si Interdigitized Test Structures, J. Appl. Phys. Vol. 44, No. 7, [lo] J. C. Ondrusek, C. F. Dunn and J. W. McPherson, Kinetics of Contact Wearout for Silicided (TiSi) and Non-Silicided Contacts, Proc. IRPS, pp, , [ll] J. R. Black, Mass Transport of Aluminum by Momentum Exchange with Conducting Electrons, Proc. Ann. Symp. on Reliability Physics, IEEE Cat , pp , [I1 H. A. Le, K. Banerjee and J. W. McPherson, The dependence of W-plug via EM performance on via size, Semiconductor Science and Technology, Vol. 11, No. 6, pp , [13] J. Tao, K. K. Young, C. A. Pico, N. W. Cheung and C. Hu, Electromigration Characteristics of Tungsten Plug Vias Under Pulse and Bidirectional Current Stressing, IEEE Electron Device Lett., vol. EDL-1, pp , 1991.

Microelectronics Reliability

Microelectronics Reliability 52 (2012) 2627 2631 Contents lists available at SciVerse ScienceDirect Microelectronics Reliability journal homepage: www.elsevier.com/locate/microrel Investigation on CDM